1. Field
This disclosure relates generally to semiconductors, and more specifically, to processing operating speeds that exist in semiconductor packages having multiple die.
2. Related Art
It is well known to stack two or more semiconductor packages on top of each other to reduce footprint area. Others have also proposed stacking two or more semiconductor die on top of each other. Various solutions have been proposed for addressing problems associated with additional heat that is generated when two separate semiconductors are placed in close proximity with each other. The size of the semiconductors and their functions continue to limit the practical use of stacked semiconductors, as well as the ability to efficiently make electrical connections to multiple semiconductors in close proximity.
Commercial data processing systems typically utilize multiple cores or processing units. For example, it is common in the desktop processing environment for dual core processors to be efficiently used by splitting functions in a method that concurrently processes information. In U.S. Pat. No. 7,279,795 issued to Periaman et al. a stacked die semiconductor is disclosed in which one die is a multiple core processor die and a second die contains a shared memory for the multiple cores. The shared memory must therefore be made large to minimize the number of memory accesses to a main off-chip memory. The effective data communication bandwidth of such a configuration is lowered as compared to a single chip implementation in which each processor core has a memory and a memory control located on the same die. Efficiently addressing both the data communication bandwidth and the size or package footprint issues in multiple processing core systems remains problematic.